1. Field of the Invention
The present invention relates to a Schmitt trigger circuit. Specifically, this invention is a trigger voltage controllable Schmitt trigger circuit where levels of trigger voltage can be varied according to external control signals.
2. Discussion of Related Art
Once an output voltage is reversed, it does not change even if an input voltage varies near a threshold voltage in a Schmitt trigger circuit, thus the circuit is maintained at a stable state. This stability is proportional to the volume of hysteresis.
This Schmitt trigger circuit having such a property is utilized as an input buffer for pulse waveshaping, elimination of chattering, and prevention of noise impact.
A conventional Schmitt trigger circuit is described below with reference to the attached drawings.
FIG. 1 is a diagram of the conventional Schmitt trigger circuit. FIG. 2 is a graph showing the trigger points of the conventional Schmitt trigger circuit.
Trigger voltage is constant in the conventional Schmitt trigger circuit. The circuit consists of: first and second pMOS transistors M1 and M2, and first and second nMOS transistors M4 and M3, which are connected one another in series, and whose gates are commonly connected to an input terminal; third pMOS transistor M5 where its drain is connected to the source of first pMOS transistor M1 and its source is grounded; and third nMOS transistor M6 where its source is connected to the source of second nMOS transistor M3 and its drain is connected to a power source voltage terminal. Second nMOS transistor M3 is connected to third nMOS transistor M2 in series. First pMOS transistor M1 is connected to a power source voltage terminal, and first nMOS transistor M4 is grounded. The gates of third pMOS transistor M5 and third nMOS transistor M6 are commonly connected to second nMOS transistor M3, the drain of second pMOS transistor M2, and the output terminal.
This conventional Schmitt trigger circuit, as a modified buffer or inverter, is designed so that its DC transfer curve has a predetermined noise margin, instead of following the logic threshold voltage of general buffer or inverter when input increases from LOW to HIGH or decreases from HIGH to LOW.
With reference to FIG. 2, the operation of this conventional Schmitt trigger circuit is described below.
When input transforms from LOW to HIGH, output is HIGH. When the input exceeds the threshold voltage of first nMOS transistor M4, first nMOS transistor M4 is on, following the start of third nMOS transistor M6. Once third nMOS transistor M6 is on, voltage is applied to the source of second nMOS transistor M3. To turn on second nMOS transistor M3, voltage (B shown in FIG. 2) obtained by adding its threshold voltage to the voltage which is applied to its source, must be supplied to its gate. This is because first nMOS transistor M4 and third nMOS transistor M6 are composed in a specified resistance ratio. If the input voltage continuously increases, the output decreases to LOW and is grounded.
When the input decreases from HIGH to LOW, so the potential level of the input terminal becomes lower than the threshold voltage of first pMOS transistor M1, first pMOS transistor M1 is on. Third pMOS transistor M5 is then on, and first pMOS transistor M1 and third pMOS transistor M5 have a resistance ratio.
Third pMOS transistor M5 is on, and voltage is supplied to the source of second pMOS transistor M2. To turn on second pMOS transistor M2, voltage (A shown in FIG. 2) obtained by subtracting its threshold voltage from the voltage applied to its source, must be applied. If the level of the input voltage continuously decreases, first pMOS transistor M1 and second pMOS transistor M2 pass the power source, thus the output is settled to the potential of the power source voltage.
The conventional Schmitt trigger circuit changes output values in a predetermined noise margin according to the control of the trigger voltage by first and third pMOS transistors M1 and M5 and first and third nMOS transistors M4 and M6.
As shown in FIG. 2, since this conventional Schmitt trigger voltage has a fixed trigger voltage, it must be replaced with another IC having a different trigger voltage level when the trigger voltage is necessary to be changed. This produces the problem of applicability.